The present invention relates to a method of manufacturing a gate electrode in which, for example, a refractory metal film and a polysilicon film are used, and more specifically, to a method of manufacturing a semiconductor device including a gate electrode having a polymetal structure, which is a laminate structure of W/WNxSi/Poly-Si or the like.
The performance of MOS LSIs is becoming higher as the gate length of the MOS FETs is reduced. With the reduction of the gate length, the delay of a signal (called "propagation delay" ) when it is transmitted in the gate width direction is becoming impossible to neglect. In order to suppress the propagation delay, it is necessary to use a gate electrode of a low resistance. In general, a gate electrode employs a polycide gate structure in which a refractory metal silicide film such as tungsten silicide film is laminated on a polysilicon film. However, it is presently considered to use the polymetal gate structure, since it can lower the resistance value than the polycide gate structure does. The polymetal gate structure has a structure in which a refractory metal film such as of tungsten, which has a specific resistance smaller than that of a refractory metal silicide film by one digit, is laminated on a polysilicon film.
FIGS. 1 to 4 illustrates the first prior art example. The first prior art example is an cross sectional structure of a general polymetal gate electrode. In FIG. 4, a polymetal gate electrode containing a polysilicon film (the lower portion of the gate electrode) 3, a first tungsten nitride film 16 and a tungsten film (the upper portion of the gate electrode) 5a, is formed via a gate insulating film (a gate oxide film) 2 on a P-type semiconductor substrate 1.
As discussed in Jpn. Pat. Appln. KOKAI Publication No. 7-183513, a thermal oxidation, which is so called post oxidation, is carried out in the conventional method of manufacturing a MOS transistor. In the post oxidation, after the formation of the gate electrode by RIE (reactive ion etching), the polysilicon film and gate insulating film are thermally oxidated. By the post oxidation, the damage caused to the gate insulating film due to the etching can be recovered. Together with this, the lower end portion of the gate electrode is oxidated by the post oxidation to be rounded. Due to the rounded shape, when a voltage is applied to the gate, the concentration of the electrical field at the gate end portion is reduced. Therefore, the reliability of the gate insulating film at the end portion of the gate electrode is improved.
A method of manufacturing a semiconductor device which uses a polymetal gate electrode, according to the first prior art example, will now be described with reference to FIGS. 1 to 4.
As can be seen in FIG. 1, a gate insulating film 2 is formed on a semiconductor substrate 1 by thermal oxidation. Subsequently, a polysilicon film (the lower portion of a gate electrode) 3, a first tungsten nitride 16 and a tungsten film (gate electrode) 5a are deposited in this order. The first tungsten nitride film 16 serves as a reaction inhibiting film for inhibiting the reaction between the tungsten film 5aand the polysilicon film 3. Then, a first silicon nitride film 6 is deposited on the tungsten film 5a. Next, as shown in FIG. 2, the first silicon nitride film 6 is etched using a resist, though not shown, as a mask. Further, with use of the first polysilicon nitride film 6 as a mask, the tungsten film 5a, the first tungsten nitride film 16 and the polysilicon film 3 are etched, thus forming a gate electrode. Subsequently, as shown in FIG. 3, a round portion 8 is formed at the lower end section of the polysilicon film 3 by carrying out the post-oxidation step. Next, ion implantation is carried out while using the gate electrode as a mask, and thus N-type source/drain regions 9 are formed in the substrate 1. Next, as shown in FIG. 4, an interlayer insulating film 10 is formed on an entire surface, and a contact hole 11 is formed in the interlayer insulating film 10 and the first silicon nitride film 6. In the contact hole 11, a wiring layer 12 made of a metal is formed.
In the post oxidation step, the tungsten film 5a, when oxidated, expands its volume, and the shape of the gate becomes abnormal. Therefore, in this step, it is required to selectively oxidate the polysilicon film 3 only. More specifically, by controlling the partial pressures and flow amounts of H.sub.2 O and H.sub.2, the oxidation is carried out in an atmosphere which is controlled to oxidate only silicon. At the same time, however, a portion of the tungsten film 5a evaporates. Further, depending upon the oxidation condition, the side wall of the tungsten film 5a may retreat backwards significantly, and in some cases, the film becomes narrowed by 10 nm or more on one side. As described, in the first prior art example, the oxidation of the tungsten film is avoided as much as possible by controlling the atmosphere of the post oxidation step. However, in the post oxidation step, the oxidation atmosphere is controlled, and therefore a control device, which is very costly, is required. Further, a portion of the tungsten film 5a is evaporated so that the tungsten film 5a becomes slender, and such a technique may becomes a factor of increasing the wiring resistance. Further, when evaporated tungsten film attaches to the substrate, the contamination of metal occurs, thus increasing the junction leakage. As a result, the deterioration of a property such as the data retention performance of the memory cell occurs.
FIGS. 5 to 10 illustrate the second prior art example. The second prior art example is discussed in Jpn. Pat. Appln. KOKAI Publication No. 7-183513. The second prior art example is not a technique involving a polymetal gate structure as in the first prior art example, but an invention regarding a gate electrode having a so-called polycide structure in which a refractory metal silicide film is used as the upper electrode member of the gate electrode. In addition, the second prior art example discloses not a technique of avoiding the evaporation of the gate electrode member, but a technique of inhibiting the oxidation thereof. More specifically, as shown in FIG. 10, the second silicon nitride film 13 is formed on a side wall of the refractory metal silicide film (the upper portion of the gate electrode) 5b, and with this structure, the oxidation of the refractory metal silicide film 5b is suppressed.
The manufacture method according to the second prior art example will now be described with reference to FIGS. 5 to 10. As shown in FIG. 5, the method includes a step of depositing not a tungsten film, but a tungsten silicide film 5b as the upper portion of the gate electrode. The other processing steps are similar to those of the first prior art example. A gate insulating film 2 is formed on a substrate 1. On the gate insulating film 2, a polysilicon film (the lower portion of the gate electrode) 3, a tungsten silicide film (the upper portion of the gate electrode) 5b and a first silicon nitride film 6 are formed in the order. Then, a natural oxide film 4 is created between the polysilicon film 3 and the tungsten silicide film 5b. Subsequently, as shown in FIG. 6, the first silicon nitride film 6, the tungsten silicide film 5b and the natural oxide film 4 are etched. In this etching, the polysilicon film 3 is left without being etched. Next, as shown in FIG. 7, a second silicon nitride film 13 is deposited on the entire surface. Then, as shown in FIG. 8, the second silicon nitride film 13 is etched back by RIE, and thus the second silicon nitride film 13 remains on side walls of the first silicon nitride film 6 and the tungsten silicide film 5b. Further, the polysilicon film 3 is etched using a side wall made of the second silicon nitride film 13 as a mask. Next, as shown in FIG. 9, with the post oxidation, that is, a heat treatment, the damage caused by the etching is recovered and a round portion 8 is formed at the lower end portion of the polysilicon film 3. Next, source/drain regions 9 are formed within the substrate 1 by ion implantation. Next, as shown in FIG. 10, the entire surface of coated with an interlayer insulation film 10 and a contact hole 11 is formed in the interlayer insulation film 10 and the first silicon nitride film 6. Next, a metal film is deposited on the entire surface, and then lithography and etching are carried out to form a wiring layer 12.
In the second prior art example, the second silicon nitride film 13 is formed on a side wall of the tungsten silicide film 5b. With this structure, it is possible to prevent, in the post oxidation step, the oxidation of the tungsten silicide film 5b which constitutes the upper portion of the gate electrode. Therefore, an increase in the wiring resistance can be suppressed. However, the second silicon nitride film 13 formed on the side wall of the tungsten silicide film 5b, and does not serve as a gate electrode. Consequently, the region of the gate electrode is increased by the region of the side wall. In other words, the area of the memory cell portion increases, and therefore further downsizing of the device is prevented.